intr.fields.intr_masking = 1;
intr.fields.vector = trap;
intr.fields.prio = 0xF;
+ intr.fields.ign_tpr = 1;
vmcb->vintr = intr;
// printf( "IRQ = %d\n", trap );
return 0;
}
/* Now let's check for newer interrrupts */
else {
- /* Interrput pending at the PIC? */
- hvm_pic_assist(v);
- if (vpit->pending_intr_nr) {
- pic_set_irq(pic, 0, 0);
- pic_set_irq(pic, 0, 1);
- }
-
- if (plat->interrupt_request) {
- intr_vector = cpu_get_interrupt(v, &intr_type);
- plat->interrupt_request = 0;
- }
+ if ( v->vcpu_id == 0 )
+ hvm_pic_assist(v);
+
+ /* Before we deal with PIT interrupts, let's check
+ for interrupts set by the device model.
+ */
+ if ( cpu_has_pending_irq(v) ) {
+ intr_vector = cpu_get_interrupt(v, &intr_type);
+ }
+ else if ( (v->vcpu_id == 0) && vpit->pending_intr_nr ) {
+ pic_set_irq(pic, 0, 0);
+ pic_set_irq(pic, 0, 1);
+ intr_vector = cpu_get_interrupt(v, &intr_type);
+ }
}
/* have we got an interrupt to inject? */
__update_guest_eip(vmcb, 1);
+ /* check for interrupt not handled or new interrupt */
+ if ( vmcb->vintr.fields.irq || cpu_has_pending_irq(v) )
+ return;
+
if ( !v->vcpu_id )
next_pit = get_pit_scheduled(v, vpit);
next_wakeup = get_apictime_scheduled(v);
next_wakeup = next_pit;
if ( next_wakeup != - 1 )
set_timer(¤t->arch.hvm_svm.hlt_timer, next_wakeup);
-/* temporary workaround for 8828/8822 evtchn patches causing SVM failure.
hvm_safe_block();
-*/
}